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NXP Semiconductors /NeoM3 /SYSCON /RSTCON1

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Interpret as RSTCON1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RSTIOCON)RSTIOCON 0 (RSTDAC)RSTDAC 0 (RSTCANACC)RSTCANACC 0RESERVED

Description

Individual peripheral reset control bits

Fields

RSTIOCON

Reset control bit for the IOCON registers.
RSTDAC

D/A converter (DAC) reset control bit.
RSTCANACC

CAN acceptance filter reset control bit.
RESERVED

Reserved. Read value is undefined, only zero should be written.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data